Device Parameters (Device menu)

This group of selections from the Device menu are parameters that affect the device as a whole, as opposed to influencing only one region.

Area

This command opens a dialog box for specifying the cross-sectional area of the device. The area can be specified in the most convenient units, be that cm2, mm2, or um2. This area is the projected area of the device, unaffected by surface texture. It is the area over which illumination intensity (watts/cm2) is figured.

Texture

This selection can be used to open a dialog box for specifying the details of surface texture on the front and/or rear surface of the device. This feature is intended for devices with etched front surfaces that have a specific facet angle with respect to the plane of the substrate. The cross-sectional area for current flow is larger at the textured surface than at the back surface by the factor 1/cos(a), where "a" is the facet angle. The facet model assumes that the cross-sectional area decreases with a Gaussian shape from its value at the surface toward the substrate value, with a standard-deviation depth constant equal to one-sixth of the facet depth. The most important feature of the facet model is that it incorporates the increased carrier recombination that occurs at or near a textured surface as a direct result of the increased surface area. Note that (111) facets etched anisotropically into a (100)-oriented surface make a facet angle of 54.74 degrees. The choice of facet angle and depth also affects the photogeneration profile, because it causes photons to travel an oblique path through the device.

Front/Rear Surfaces

This selection opens a dialog box for either the front or rear surface of the device, indicating which of three electrostatic models are to be used. The available models are Neutral, Barrier, and Charged. A Neutral surface is assumed to have no net volume charge density at the surface. A surface with a Barrier has a net charge at the surface due to band bending. You specify the barrier height in electron-volts (eV). A positive value bends the bands downward. A Charged surface also results in band bending near the surface. In this case, the density of charges external to the device can be specified (charges/cm2). A positive density implies positive external charge, which bends the bands downward, producing a negatively-charged region within the device. Although identical equilibrium band bending can be obtained by specifying either a Barrier height or surface Charge, the two surface conditions differ when excitation is applied. While the Barrier maintains a constant surface volume charge density, the Charged surface maintains a constant surface electric field.

Circuit Connnections (Contacts submenu)

The Circuit connections option opens a dialog box for specifying the physical location of the device's ohmic contacts to the external emitter, base, and collector source circuits. These locations are given as distances from the front surface of the device. If a location is specified that is higher than the device width, then the rear surface of the device is used for that contact. For contacts within the bulk of the device, the precise location of contact may be shifted slightly from that specified so that the contact can be made at a node between finite elements. The default settings are an emitter contact at x=0 (the front) and base and collector contact at x=10,000 um (the rear). You can also specify values for internal series resistance associated with each of the three ohmic contacts. There is a minimum value of these resistances of 1 micro-ohm for numerical-computation reasons. Any voltage drop across these internal series resistances does affect the current-voltage behavior calculated and plotted for the device.

By default, the Emitter and Base contact are Enabled, and the Collector is Disabled. Specifying external source circuits will have no effect unless the corresponding connection to the device for each source has been Enabled. At least one contact should always be Enabled; otherwise, there is no voltage reference for the device and the solution may not converge.

The concept of a contact in the middle of a device may seem strange, but this generalization is necessary to model three-terminal devices. In a three-dimensional situation, the current for the middle contact (e.g. the base of a bipolar transistor) is conducted to the active region of the device from a contact that is removed some distance perpendicular to the active device dimension. Assuming that this remote contact is in a heavily-doped area that remains in low-level injection, a voltage imposed on the contact shifts the majority-carrier quasi-Fermi potential from its equilibrium value by an amount equal to the applied voltage. This shift in quasi-Fermi level can be assumed to be nearly constant between the contact and the active region of the device, even when the active region is in high-level injection. A small slope in the quasi-Fermi potential between the contact and the active region would result from resistance in the intervening layer. This can be modeled using the internal series resistance. PC1D assumes that all three contacts can be treated as injection points for majority-carrier current at which the majority-carrier quasi-Fermi potential is shifted by the applied voltage, less any drop across the internal resistance.

Internal Shunt Elements (Contacts submenu)

Four internal shunt circuit elements can be enabled (they are normally disabled). Each element can be a conductor, diode, or capacitor. These elements can be connected between any two locations within the device. The precise location of connection for the anode and cathode may be shifted slightly from the specified positions so that the contact can be made at a node between finite elements. Conductors are specified in terms of their conductance (inverse of resistance). Diodes are specified in terms of a saturation current and an ideality factor. Capacitors are specified in terms of their capacitance.

The internal shunt elements can be used to represent three-dimensional effects found in real devices. For example, junction leakage often occurs where the junction intersects the semiconductor surface. This can usually be modeled as a combination of shunt conductance and a diode having an ideality factor of 2 or greater. The shunt diode can also be used to model recombination that occurs in an area of the device not explicitly being solved. Attachment of internal shunt elements may adversely impact the convergence speed of the solution, because these elements couple the solution at widely different locations within the device, and this coupling is not fully accounted for in the limited-bandwidth matrix used by PC1D to solve the semiconductor equations.

Reflectance

This selection allows you to specify the external optical reflectance for the front and rear surfaces, and the internal optical reflectances for both surfaces. The internal reflectance can be different for the first encounter of light with that surface than for subsequent encounters. Also, the internal reflectance at each surface can be either specular (polished) or diffuse (lambertian). Internal reflectance at the interfaces between device regions composed of different materials is not accounted for by PC1D.

For the external reflectance of the front or rear surface, a dialog box is opened which gives three options: Fixed, Coated, or External. Fixed reflectance is constant for all incident wavelengths. The Coated option allows you to specify the thickness and index of refraction for up to three optical coating layers, plus a baseline reflectance that is the same for all wavelengths. Layer 1 corresponds to the first layer deposited while layer 3 is the last layer deposited. Thus light must traverse the layers in reverse numerical order as it passes from the air into the device. Table 1 gives the index of refraction for some common optical-coating materials for wavelengths in the visible spectrum. Facet angles are not taken into consideration in the calculation of reflectance for a coated surface. If your front surface is textured, you should either enter a Fixed reflectance or provide an external file containing reflectance data.

To minimize reflectance over a broad spectrum, the layers should be stacked in order of decreasing index of refraction with the highest-index material adjacent to the device. The thickness of each layer should be one-quarter wavelength within the material. A layer of Si3N4 would need to be about 75 nm thick to minimize reflectance at a wavelength of 600 nm. Note that some coating materials may absorb light, especially in the ultra-violet. PC1D does not take this effect into account.

Table 1: Commonly Encountered Indices of Refraction
(non-stochiometric or undensified films will differ)

External reflection files are standard ASCII files with a filename suffix REF. Each line in the file should contain two numerical values, separated by one or more spaces or a tab. The first value on each line is a value of wavelength, in nm. The second value on each line is the reflectance, normalized to unity. The maximum number of lines allowed is 200. All values of the reflectance must be between 0 and 1, and the values of wavelength must increase monotonically. If the range of wavelengths provided is less than is required for the solution of a problem, the reflectance for the first (or last) wavelength is used for all smaller (or larger) wavelengths.