**Convergence and Convergence Failure**

The equilibrium solution of the semiconductor equations is remarkably robust and will almost always converge. But the extreme nonlinearity of the fully-coupled semiconductor device equations makes convergence to a non-equilibrium solution difficult. Several measures have been taken within PC1D to assist convergence, but despite this you will eventually generate problems that will not converge. This section offers some advice on how to avoid convergence failure, and how to deal with it when it does occur.

**Dynamic renoding**

This feature was introduced in PC1D 4.2, and reduces the likelihood of non-convergence. The basic idea is that when PC1D detects that part of the device is not converging well, it increases the number of finite elements in the difficult area. This helps to ensure that the assumptions which PC1D makes about the behaviour of solution variables remain valid.

Dynamic renoding is particularly significant for problems involving reverse biased current sources.

In general, convergence failure occurs either because:

(a) the dynamic renoder ran out of nodes (currently, there is a limit of 500);

or (b) the solution is trying to reach a final state that is too far removed from the initial state;

or (c) the situation is unphysical and has no solution.

**Situations which are known to interfere with convergence**

The following situations should be avoided as they make convergence difficult:

1. Locating an electrical contact in a region that, in equilibrium, is either very lightly doped or depleted. If the region in equilibrium is clearly of one type or the other, that type will be assumed to be the polarity of the contact, even if subsequent excitation causes the carrier concentrations at that point to become inverted.

2. Connecting a shunt element between two dopant regions that are both isolated by a junction from an electrical contact. This situation occurs in modeling series-connected multijunction devices. It is generally best to model these devices instead as three-terminal devices, then infer the two-terminal behavior from the three-terminal results.

3. Appling a large forward voltage with no current-limiting resistor. The currents in the device can become huge in this case, and numerical overflow can occur.

4. Low velocity saturation. This is a problem when carriers are trying to go faster than the velocity limit. This problem can be avoided by setting the limit to zero (which disables velocity saturation), or by choosing fixed mobility rather than variable. The problem is even more severe if total velocity saturation is specified for the numerical method.

**Improving convergence by controlling the numerical method**

The following actions can be taken to try to get the problem to converge without changing the definition of the problem.

1. Change the element size factor in the Compute:Numerical dialog box.

By decreasing the element size factor, you increase the number of elements in the problem. Decreasing this value will tend to improve convergence, until the maximum of 500 elements is reached. However, the problem will take longer to solve. Sometimes, you will encounter situations where convergence can be improved by *increasing* the element size factor.

2. Adjust the normalized potential clamp (also in the Compute:Numerical dialog box).

A smaller value (between 0.1 and 1) will sometimes improve convergence, although some problems benefit from larger clamp values (5-10). It is particularly helpful to reduce this value when voltage, current or light are applied abruptly. Small clamp values increase the time required to solve the problem, especially problems where large reverse-bias voltages are applied.

3. Ensure that *Psi* and *Phi clamping* (in the Compute:Numerical dialog box) are not both disabled.

4. Turn off *Total velocity saturation* (in the Compute:Numerical dialog box) unless you need to include this effect (as you might for some heterostructures where current is limited by velocity saturation in areas of sharp carrier-concentration gradients).

5. On some occasions the difficulty simply may be that the problem converges very slowly. In this case, you should increase the time limit in the Compute:Numerical dialog box.

**Improving convergence by imposing excitation gradually**

This is the most effective way of improving convergence. For example, to solve a silicon junction forward-biased to 0.8 volts, you may need to perform an interim solution at 0.6 volts first. You should solve the problem for steady-state at 0.6 volts, then change the bias to 0.8 volts and use Compute:Continue. This will solve for steady-state, using the interim solution as the starting point for the next solution.

Similarly, it may be necessary to increase the light intensity in steps, say 10 mW/cm2, 100 mW/cm2, then 1 W/cm2.

If you have a particular interest in understanding exactly why a particular problem did not converge, you can enable *Graphs after every iteration* in the Compute:Numerical dialog, and create a user-defined graph of *Convergence Error *(plotted on a log scale)* *versus *Distance from front*. This will show how far each element of the device is from convergence.